| Removed code that modified i->address. (i->address is supposed to reflect what is found in the instruction and not TPR.CA / Y) |
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about 11 years ago
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| cleaned up fault tag 1,2, & 3 enums |
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about 11 years ago
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| Added doFault(…) calls….. |
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about 11 years ago
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| A few changes to EISRead/Write to allow for AR/PR access from absolute mode (not just append mode!) |
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about 11 years ago
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| A simple macro preprocessor for as8+ |
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about 11 years ago
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| Made a few changes to DoTest script. |
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about 11 years ago
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| Add tags |
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about 11 years ago
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| added doFault(…) to default behavior of instruction switche()s to properly handle unimplemented opcode. |
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about 11 years ago
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| Merge remote-tracking branch 'origin/master' |
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about 11 years ago
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| added doFault(…) to default behavior of instruction switches to properly handle unimplemented opcode. |
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about 11 years ago
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| Merge branch 'master' of ssh://git.code.sf.net/p/dps8m/code |
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about 11 years ago
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| Fix FAULT_BASE computation; dead code cleanup |
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about 11 years ago
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| Print cycle count on DIS exit |
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about 11 years ago
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| Add b29_test; cleanup early ABSA efforts; implement a truly shameful ABSA. |
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about 11 years ago
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| Some ACV enumerator clean-ups |
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about 11 years ago
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| Made allowances for Append mode Read/Write from ABSOLUTE mode |
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about 11 years ago
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| Added doFault() call to acvFault() |
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about 11 years ago
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| Added doFault() handlers. replaced fprintf(stderr, …) with sim_printf(…) |
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about 11 years ago
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| Fix regressions from bug12 |
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about 11 years ago
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| Added UnitTest compatibilty switches; fixed UnitTest regressions |
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about 11 years ago
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| Fat fingers added too many files in previous commit |
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about 11 years ago
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| Added CAMP, CAMS; Added testing code for bit29 PrepareCA; Added .FC to dir_flt0_ fault in doFault() calls; Added TRANSFER to APPEND_mode; Commented out ABSOLUTE_ mode sense bit hack (breaks unit tests); Fixed SCU exec_intr_mask (again) |
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about 11 years ago
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| Fixes to DIS, sim interface, LDI, LPRPn, SPRPn, APSA, EPBP, CIOC, interrupts; Add LDBR, SDBR, CIOC |
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about 11 years ago
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| Comments about t4d issues |
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about 11 years ago
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| Add cioc instruction, hack for t4d tape address mode test. |
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about 11 years ago
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| Add handling of non-MST blocks |
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about 11 years ago
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| Add CPU switch configuration |
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about 11 years ago
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| Add CPU configuration switch support for RSW instruction |
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about 11 years ago
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| simh .ini file to boot t4d_b.2.tap |
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about 11 years ago
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| Add RSW instruction; Put in code in invert carry on subtraction |
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about 11 years ago
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